It is necessary in many applications to synchronize the local clocks of the computing nodes of a network to avoid errors. This is particularly necessary in process control applications wherein the computing nodes are dealing with a sequence of events as clock errors may result in an event being interpreted as wrongly occurring before or after another event. Current methods are not accurate enough for power generation requirements of resolution of around 1 millisecond.
Each computing node in an Ethernet environment generally includes components that are capable of interfacing a computer at the node with computers at other nodes. These components include a physical (PHY) layer or transceiver and a media access controller (MAC). The PHY transceiver is connected to the network and the MAC is connected between the PHY transceiver and the local computer at the computing node. U.S. Pat. No. 5,953,345 describes a clock synchronization technique for an Ethernet environment. This technique employs a separate global clock signal and synchronization pulse, each being distributed on separate dedicated wires to the PHY transceiver and MAC controller of each node.
This technique is unsuitable for many applications, in which separate wires are unavailable or too expensive.
The present invention communicates synchronization information to Ethernet components that is accurate enough to achieve the required resolution without the dedicated wiring.
The present invention also provides many additional advantages that shall become apparent as described below.